1. Field of the Invention
The present invention generally relates to electrostatic discharge protection techniques. More particularly, the present invention relates to an electrostatic discharge protection circuit fabricated in semiconductor-on-insulator structures.
2. Description of the Related Art
Semiconductor-on-insulator (SOI) technology employs a semiconductor film overlying an insulating layer on a supporting substrate. Therefore, field effect transistors such as MOSFETs fabricated in the semiconductor film of an SOI structure have many advantages over those MOSFETs fabricated on the traditional bulk semiconductor substrates, including resistance to short-channel effect, steeper subthreshold slopes, increased current drive, higher packing density, reduced parasitic capacitance, and simpler processing steps.
However, a major obstacle to the use of SOI technology in production is electrostatic discharge (ESD) susceptibility. In bulk-substrate technology, good ESD protection levels have been demonstrated by using nMOS/CMOS buffers. However, this protection scheme is not compatible with SOI structures. For instance, thick-oxide devices are not available on an SOI substrate. Furthermore, vertical large-area low-series-resistance PN junctions are not available if the semiconductor film is thinner than 2000 .ANG..